Hi Jonathan, Thank for your answer.
I have re build my OpenBSD with Artheros Phy support com0: console cpsw0 at omap0: version 1.12 (0), address d4:94:a1:84:28:f2 atphy0 at cpsw0 phy 0: F1 10/100/1000 PHY, rev. 4 atphy1 at cpsw0 phy 1: F1 10/100/1000 PHY, rev. 4 scsibus0 at sdmmc0: 2 targets, initiator 0 sd0 at scsibus0 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 0/direct fixed But the result is same. I try to install last version of NetBSD to test. If you or an other person have BeaglBoard with OpenBSD installed is it possible to send to me the result of this command. On OpenBsd nc -l 1234 > /dev/null on other host (with XXBSD example OS X); mkfile 100m CentM date;nc <@IP of your BeagleBoard> 1234 < CentM;date If you use Linux try with this command to create 100M file. dd if=/dev/zero of=CentM bs=100M count=1 Thank Bernard Merindol PS: send also the result of ifconfig cpsw0 On 3 nov. 2014, at 14:13, Jonathan Gray <j...@jsg.id.au> wrote: > > > You have a different phy to the beaglebone boards. > It seems to be an Atheros phy that would be handled by atphy(4) > if it were added to the kernel configuration. > > I doubt that would make much of a difference though. > > rev 1.5 in NetBSD which programs the multicast filter could be > interesting > > http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/arm/omap/if_cpsw.c?only_with_tag=MAIN > > "Make cpsw driver work without uboot support > > On some eval boards such as BeagleBone, the cpsw device is initialized > rightly by the uboot of the boards so that the cpsw driver doesn't need > to do some initializations but works fine. > > The patch adds initializations to make the driver work solely. It also > adds support for 1000BaseT (RGMII) PHY that is equipped on some boards, > e.g., CKB-3352." > > It seems the phy might need special handling according to > http://processors.wiki.ti.com/index.php/AM335x_General_Purpose_EVM_HW_User_Guide#Gbit_Ethernet > > "Note: The GP EVM PCB does not support external delay for the clock > signals on the RGMII interface. The AR8031A PHY can be setup to use > internal clock delay mode once booting is complete. Therefore there may > be problems in function/performance when booting in Gb mode or when > running Gb Ethernet Mode before the AR8031A PHY is configured properly. > See the EVM Errata." > > Which sounds rather like the cpsw specific hack in > http://cvsweb.netbsd.org/bsdweb.cgi/~checkout~/src/sys/dev/mii/micphy.c?rev=1.3 > > On Mon, Nov 03, 2014 at 12:01:39PM +0100, Mérindol Bernard wrote: >> Hi All, >> >> I works with AM335x Starter Kit from TI, I modify the cpsw driver to works >> with 2 ports (cpsw0 and cpsw1). >> >> Before this modification I have tested the performance on native driver with >> this command. >> >> on OBSD >> nc -l 1234 > /dev/null >> >> >> on host connected by switch 100Mbit/s full duplex (MAC OX 10.10) >> >> nc 192.168.169.62 1234 < CentM >> >> where CentM il file with 100MByte (created with makefile 100m CentM). >> >> On BSD5.5 or 5.6 the time for this transfert is 93s = 8,6 Mbit/s >> >> I have try the same transfert with Linux (on same board) the time is 9s = >> 89Mbit/s >> >> The performance of transfert on OBSD is poor why ? >> >> Driver ? >> Kernel ? >> Or mistake on my configuration. >> >> I need ARM card with 2 ethernets (giga) Port to configure in routing from >> port 1 to port 2. I hope 200Mbit/s (linux performance) for this routing. >> >> Thank for your help. >> Bernard >> _________________________________ >> result of ifconfig >> # ifconfig cpsw0 >> cpsw0: flags=28843<UP,BROADCAST,RUNNING,SIMPLEX,MULTICAST,NOINET6> mtu 1500 >> lladdr d4:94:a1:84:28:f2 >> priority: 0 >> groups: egress >> media: Ethernet 100baseTX full-duplex >> status: active >> inet 192.168.169.62 netmask 0xffffff00 broadcast 192.168.169.255 >> >> >> __________________________________ >> result of dmessg >> # dmesg >> OpenBSD 5.6-current (GENERIC-OMAP) #0: Tue Oct 28 01:01:45 AEDT 2014 >> j...@armv7.jsg.id.au:/usr/src/sys/arch/armv7/compile/GENERIC-OMAP >> real mem = 268435456 (256MB) >> avail mem = 255725568 (243MB) >> warning: no entropy supplied by boot loader >> mainbus0 at root >> cpu0 at mainbus0: ARM Cortex A8 R3 rev 2 (ARMv7 core) >> cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled >> cpu0: 32KB(64b/l,4way) I-cache, 32KB(64b/l,4way) wr-back D-cache >> omap0 at mainbus0: BeagleBone >> prcm0 at omap0 rev 0.2 >> sitaracm0 at omap0: control module, rev 1.0 >> intc0 at omap0 rev 5.0 >> edma0 at omap0 rev 0.0 >> dmtimer0 at omap0 rev 3.1 >> dmtimer1 at omap0 rev 3.1 >> omdog0 at omap0 rev 0.1 >> omgpio0 at omap0: rev 0.1 >> gpio0 at omgpio0: 32 pins >> omgpio1 at omap0: rev 0.1 >> gpio1 at omgpio1: 32 pins >> omgpio2 at omap0: rev 0.1 >> gpio2 at omgpio2: 32 pins >> omgpio3 at omap0: rev 0.1 >> gpio3 at omgpio3: 32 pins >> omap0: device tiiic unit 0 not configured >> omap0: device tiiic unit 1 not configured >> omap0: device tiiic unit 2 not configured >> ommmc0 at omap0 >> sdmmc0 at ommmc0 >> ommmc1 at omap0 >> sdmmc1 at ommmc1 >> com0 at omap0: ti16750, 64 byte fifo >> com0: console >> cpsw0 at omap0: version 1.12 (0), address d4:94:a1:84:28:f2 >> ukphy0 at cpsw0 phy 0: Generic IEEE 802.3u media interface, rev. 4: OUI >> 0x001374, model 0x0007 >> ukphy1 at cpsw0 phy 1: Generic IEEE 802.3u media interface, rev. 4: OUI >> 0x001374, model 0x0007 >> scsibus0 at sdmmc0: 2 targets, initiator 0 >> sd0 at scsibus0 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 0/direct fixed >> sd0: 3781MB, 512 bytes/sector, 7744512 sectors >> sdmmc1: can't enable card >> vscsi0 at root >> scsibus1 at vscsi0: 256 targets >> softraid0 at root >> scsibus2 at softraid0: 256 targets >> boot device: sd0 >> root on sd0a (853680ee25c0e223.a) swap on sd0b dump on sd0b >> WARNING: CHECK AND RESET THE DATE! >> >> >> __________________________________________ >> Bernard M. Merindol, Grenoble France >> bern...@merindol.org GSM: +33-6-08-75-03-52 >> __________________________________________ Bernard M. Merindol, Grenoble France bern...@merindol.org GSM: +33-6-08-75-03-52
