[PATCH 03/14] drm/amd/display: prevent seamless boot on displays that don't have the preferred dig

[Stylon Wang]

From: Dmytro Laktyushkin <dmytro.laktyush...@amd.com>

Seamless boot requires VBIOS to select dig matching to link order wise. A 
significant
amount of dal logic makes assumption we are using preferred dig for eDP and if 
this
isn't the case then seamless boot is not supported.

Reviewed-by: Martin Leung <martin.le...@amd.com>
Acked-by: Stylon Wang <stylon.w...@amd.com>
Signed-off-by: Dmytro Laktyushkin <dmytro.laktyush...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 87994ae0a397..486d18290b9f 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1556,6 +1556,9 @@ bool dc_validate_boot_timing(const struct dc *dc,
        if (tg_inst >= dc->res_pool->timing_generator_count)
                return false;
 
+       if (tg_inst != link->link_enc->preferred_engine)
+               return false;
+
        tg = dc->res_pool->timing_generators[tg_inst];
 
        if (!tg->funcs->get_hw_timing)
-- 
2.25.1