From: Aurabindo Pillai <aurabindo.pil...@amd.com>

[Why&How]
If the timing generator isnt running, it does not make sense to trigger
a sync on the corresponding OTG. Check this condition before starting.
Otherwise, this will cause error like:

*ERROR* GSL: Timeout on reset trigger!

Fixes: 8c7924bdb0fe ("drm/amd/display: Disable phantom OTG after enable for 
plane disable")
Reviewed-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
Reviewed-by: Alvin Lee <alvin.l...@amd.com>
Acked-by: Stylon Wang <stylon.w...@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pil...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 355ffed7380b..c8ec11839b4d 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2216,6 +2216,12 @@ void dcn10_enable_vblanks_synchronization(
                opp = grouped_pipes[i]->stream_res.opp;
                tg = grouped_pipes[i]->stream_res.tg;
                tg->funcs->get_otg_active_size(tg, &width, &height);
+
+               if (!tg->funcs->is_tg_enabled(tg)) {
+                       DC_SYNC_INFO("Skipping timing sync on disabled OTG\n");
+                       return;
+               }
+
                if (opp->funcs->opp_program_dpg_dimensions)
                        opp->funcs->opp_program_dpg_dimensions(opp, width, 
2*(height) + 1);
        }
-- 
2.25.1

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