From: Gabe Teeger <gabe.tee...@amd.com>
[Why]
enable_sw_cntl_psr flag is not needed.
For PSR1 and PSR2, we should be passing
dirty rectangle and cursor updates to FW
regardless of enable_sw_cntl_psr flag.
[How]
Remove enable_sw_cntl_psr flag from driver.
Send cursor info and dirty rectagle status to
dmub only in the case of dcn31 and above.
Reviewed-by: Anthony Koo <anthony....@amd.com>
Reviewed-by: Robin Chen <robin.c...@amd.com>
Acked-by: Brian Chang <brian.ch...@amd.com>
Signed-off-by: Gabe Teeger <gabe.tee...@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 8 +++-----
drivers/gpu/drm/amd/display/dc/dc.h | 1 -
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 ++-
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 1 -
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c | 1 -
drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c | 1 -
drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c | 1 -
7 files changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 95daee11a445..1ca76708705b 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -3113,11 +3113,9 @@ static void commit_planes_do_stream_update(struct dc *dc,
static bool dc_dmub_should_send_dirty_rect_cmd(struct dc *dc, struct
dc_stream_state *stream)
{
- if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1)
- return true;
-
- if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_1 &&
- dc->debug.enable_sw_cntl_psr)
+ if ((stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1
+ || stream->link->psr_settings.psr_version ==
DC_PSR_VERSION_1)
+ && stream->ctx->dce_version >= DCN_VERSION_3_1)
return true;
return false;
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 473e6a0c3310..cffb91363b52 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -827,7 +827,6 @@ struct dc_debug_options {
int crb_alloc_policy_min_disp_count;
bool disable_z10;
bool enable_z9_disable_interface;
- bool enable_sw_cntl_psr;
union dpia_debug_options dpia_debug;
bool disable_fixed_vs_aux_timeout_wa;
bool force_disable_subvp;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 1eb3957f52a3..2118ad3e37d0 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -3343,7 +3343,8 @@ static bool dcn10_dmub_should_update_cursor_data(
if (dcn10_can_pipe_disable_cursor(pipe_ctx))
return false;
- if (pipe_ctx->stream->link->psr_settings.psr_version ==
DC_PSR_VERSION_SU_1 || pipe_ctx->stream->link->psr_settings.psr_version ==
DC_PSR_VERSION_1)
+ if ((pipe_ctx->stream->link->psr_settings.psr_version ==
DC_PSR_VERSION_SU_1 || pipe_ctx->stream->link->psr_settings.psr_version ==
DC_PSR_VERSION_1)
+ && pipe_ctx->stream->ctx->dce_version >=
DCN_VERSION_3_1)
return true;
return false;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
index aedff18aff56..8745132d6374 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
@@ -889,7 +889,6 @@ static const struct dc_debug_options debug_defaults_drv = {
},
.disable_z10 = true,
.optimize_edp_link_rate = true,
- .enable_sw_cntl_psr = true,
.enable_z9_disable_interface = true, /* Allow support for the PMFW
interface for disable Z9*/
.dml_hostvm_override = DML_HOSTVM_OVERRIDE_FALSE,
};
diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
index 3a9e3870b3a9..5e62527d3ab9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
@@ -911,7 +911,6 @@ static const struct dc_debug_options debug_defaults_drv = {
}
},
.optimize_edp_link_rate = true,
- .enable_sw_cntl_psr = true,
.seamless_boot_odm_combine = true
};
diff --git a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
index 7463b12ae4a3..eebb42c9ddd6 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
@@ -886,7 +886,6 @@ static const struct dc_debug_options debug_defaults_drv = {
}
},
.optimize_edp_link_rate = true,
- .enable_sw_cntl_psr = true,
.psr_power_use_phy_fsm = 0,
};
diff --git a/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c
index d56a212e065c..f4b52a35ad84 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c
@@ -886,7 +886,6 @@ static const struct dc_debug_options debug_defaults_drv = {
}
},
.optimize_edp_link_rate = true,
- .enable_sw_cntl_psr = true,
};
static const struct dc_debug_options debug_defaults_diags = {
--
2.25.1
