From: Wesley Chalmers <wesley.chalm...@amd.com>
[Why]
We are not implementing the planned new HW sequence
to disable HUBP.
[How]
Revert most related changes to minimize possibility
of regression.
Signed-off-by: Wesley Chalmers <wesley.chalm...@amd.com>
Reviewed-by: Martin Leung <martin.le...@amd.com>
Acked-by: Qingqing Zhuo <qingqing.z...@amd.com>
---
.../gpu/drm/amd/display/dc/basics/dc_common.c | 20 ++++++-------------
.../gpu/drm/amd/display/dc/basics/dc_common.h | 4 ++--
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 +-
3 files changed, 9 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/basics/dc_common.c
b/drivers/gpu/drm/amd/display/dc/basics/dc_common.c
index ad04ef98e652..b2fc4f8e6482 100644
--- a/drivers/gpu/drm/amd/display/dc/basics/dc_common.c
+++ b/drivers/gpu/drm/amd/display/dc/basics/dc_common.c
@@ -49,24 +49,20 @@ bool is_rgb_cspace(enum dc_color_space output_color_space)
}
}
-bool is_child_pipe_tree_visible(struct pipe_ctx *pipe_ctx)
+bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx)
{
if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible)
return true;
- if (pipe_ctx->bottom_pipe &&
is_child_pipe_tree_visible(pipe_ctx->bottom_pipe))
- return true;
- if (pipe_ctx->next_odm_pipe &&
is_child_pipe_tree_visible(pipe_ctx->next_odm_pipe))
+ if (pipe_ctx->bottom_pipe &&
is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe))
return true;
return false;
}
-bool is_parent_pipe_tree_visible(struct pipe_ctx *pipe_ctx)
+bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx)
{
if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible)
return true;
- if (pipe_ctx->top_pipe &&
is_parent_pipe_tree_visible(pipe_ctx->top_pipe))
- return true;
- if (pipe_ctx->prev_odm_pipe &&
is_parent_pipe_tree_visible(pipe_ctx->prev_odm_pipe))
+ if (pipe_ctx->top_pipe &&
is_upper_pipe_tree_visible(pipe_ctx->top_pipe))
return true;
return false;
}
@@ -75,13 +71,9 @@ bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx)
{
if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible)
return true;
- if (pipe_ctx->top_pipe &&
is_parent_pipe_tree_visible(pipe_ctx->top_pipe))
- return true;
- if (pipe_ctx->bottom_pipe &&
is_child_pipe_tree_visible(pipe_ctx->bottom_pipe))
- return true;
- if (pipe_ctx->prev_odm_pipe &&
is_parent_pipe_tree_visible(pipe_ctx->prev_odm_pipe))
+ if (pipe_ctx->top_pipe &&
is_upper_pipe_tree_visible(pipe_ctx->top_pipe))
return true;
- if (pipe_ctx->next_odm_pipe &&
is_child_pipe_tree_visible(pipe_ctx->next_odm_pipe))
+ if (pipe_ctx->bottom_pipe &&
is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe))
return true;
return false;
}
diff --git a/drivers/gpu/drm/amd/display/dc/basics/dc_common.h
b/drivers/gpu/drm/amd/display/dc/basics/dc_common.h
index b061497480b8..7c0cbf47e8ce 100644
--- a/drivers/gpu/drm/amd/display/dc/basics/dc_common.h
+++ b/drivers/gpu/drm/amd/display/dc/basics/dc_common.h
@@ -30,9 +30,9 @@
bool is_rgb_cspace(enum dc_color_space output_color_space);
-bool is_child_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
+bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
-bool is_parent_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
+bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 0726fb435e2a..b79a17f6a9cc 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1575,7 +1575,7 @@ static void dcn20_update_dchubp_dpp(
- if (is_pipe_tree_visible(pipe_ctx))
+ if (pipe_ctx->update_flags.bits.enable)
dc->hwss.set_hubp_blank(dc, pipe_ctx, false);
}
--
2.17.1
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