From: Po-Ting Chen <robin.c...@amd.com>
[Why]
To get the pixel statistics on every frame, change ABM
sample rate from 2 to 1.
[How]
Change LS, HS and BL sample rate to 1.
Signed-off-by: Po-Ting Chen <robin.c...@amd.com>
Reviewed-by: Anthony Koo <anthony....@amd.com>
Acked-by: Qingqing Zhuo <qingqing.z...@amd.com>
---
drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
b/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
index 453aaa5757bd..eb1698d54a48 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c
@@ -72,11 +72,11 @@ static void dmub_abm_init(struct abm *abm, uint32_t
backlight)
{
struct dce_abm *dce_abm = TO_DMUB_ABM(abm);
- REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x103);
- REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x101);
- REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x103);
- REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x101);
- REG_WRITE(BL1_PWM_BL_UPDATE_SAMPLE_RATE, 0x101);
+ REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x3);
+ REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x1);
+ REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x3);
+ REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x1);
+ REG_WRITE(BL1_PWM_BL_UPDATE_SAMPLE_RATE, 0x1);
REG_SET_3(DC_ABM1_HG_MISC_CTRL, 0,
ABM1_HG_NUM_OF_BINS_SEL, 0,
--
2.17.1
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