This is a note to let you know that I've just added the patch titled
drm/amd/display: Keep PLL0 running on DCE 6.0 and 6.4
to the 6.12-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-amd-display-keep-pll0-running-on-dce-6.0-and-6.4.patch
and it can be found in the queue-6.12 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From [email protected] Wed Apr 1 02:44:15
>2026
From: Rosen Penev <[email protected]>
Date: Tue, 31 Mar 2026 17:39:03 -0700
Subject: drm/amd/display: Keep PLL0 running on DCE 6.0 and 6.4
To: [email protected]
Cc: "Alex Deucher" <[email protected]>, "Christian König"
<[email protected]>, "Xinhui Pan" <[email protected]>, "David Airlie"
<[email protected]>, "Simona Vetter" <[email protected]>, "Harry Wentland"
<[email protected]>, "Leo Li" <[email protected]>, "Rodrigo Siqueira"
<[email protected]>, "Ray Wu" <[email protected]>, "Wayne Lin"
<[email protected]>, "Mario Limonciello" <[email protected]>, "Roman
Li" <[email protected]>, "Eric Yang" <[email protected]>, "Tony Cheng"
<[email protected]>, "Mauro Rossi" <[email protected]>, "Timur Kristóf"
<[email protected]>, "Alex Hung" <[email protected]>,
[email protected] (open list:RADEON and AMDGPU DRM DRIVERS),
[email protected] (open list:DRM DRIVERS),
[email protected] (open list)
Message-ID: <[email protected]>
From: Timur Kristóf <[email protected]>
[ Upstream commit 0449726b58ea64ec96b95f95944f0a3650204059 ]
DC can turn off the display clock when no displays are connected
or when all displays are off, for reference see:
- dce*_validate_bandwidth
DC also assumes that the DP clock is always on and never powers
it down, for reference see:
- dce110_clock_source_power_down
In case of DCE 6.0 and 6.4, PLL0 is the clock source for both
the engine clock and DP clock, for reference see:
- radeon_atom_pick_pll
- atombios_crtc_set_disp_eng_pll
Therefore, PLL0 should be always kept running on DCE 6.0 and 6.4.
This commit achieves that by ensuring that by setting the display
clock to the corresponding value in low power state instead of
zero.
This fixes a page flip timeout on SI with DC which happens when
all connected displays are blanked.
Signed-off-by: Timur Kristóf <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Alex Hung <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Signed-off-by: Rosen Penev <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
--- a/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c
@@ -889,7 +889,16 @@ static bool dce60_validate_bandwidth(
context->bw_ctx.bw.dce.dispclk_khz = 681000;
context->bw_ctx.bw.dce.yclk_khz = 250000 *
MEMORY_TYPE_MULTIPLIER_CZ;
} else {
- context->bw_ctx.bw.dce.dispclk_khz = 0;
+ /* On DCE 6.0 and 6.4 the PLL0 is both the display engine clock
and
+ * the DP clock, and shouldn't be turned off. Just select the
display
+ * clock value from its low power mode.
+ */
+ if (dc->ctx->dce_version == DCE_VERSION_6_0 ||
+ dc->ctx->dce_version == DCE_VERSION_6_4)
+ context->bw_ctx.bw.dce.dispclk_khz = 352000;
+ else
+ context->bw_ctx.bw.dce.dispclk_khz = 0;
+
context->bw_ctx.bw.dce.yclk_khz = 0;
}
Patches currently in stable-queue which might be from [email protected] are
queue-6.12/drm-amd-amdgpu-decouple-aspm-with-pcie-dpm.patch
queue-6.12/drm-amd-display-reject-modes-with-too-high-pixel-clock-on-dce6-10.patch
queue-6.12/drm-amd-display-fix-dce-6.0-and-6.4-pll-programming.patch
queue-6.12/drm-amd-display-disable-scaling-on-dce6-for-now.patch
queue-6.12/drm-amd-display-disable-fastboot-on-dce-6-too.patch
queue-6.12/drm-amd-display-correct-logic-check-error-for-fastboot.patch
queue-6.12/drm-amd-amdgpu-disable-aspm-in-some-situations.patch
queue-6.12/drm-amd-display-keep-pll0-running-on-dce-6.0-and-6.4.patch
queue-6.12/drm-amd-display-adjust-dce-8-10-clock-don-t-overclock-by-15.patch
queue-6.12/drm-amd-disable-aspm-on-si.patch
