From: Leo Ma <hanghong...@amd.com>

[WHY && HOW]
For some HDMI OVT timing, YCbCr422 encoding fails at the DSC
bandwidth check. The root cause is our DSC policy for timing
doesn't account for HDMI YCbCr422 native support.

Cc: Mario Limonciello <mario.limoncie...@amd.com>
Cc: Alex Deucher <alexander.deuc...@amd.com>
Cc: sta...@vger.kernel.org
Reviewed-by: Chris Park <chris.p...@amd.com>
Signed-off-by: Leo Ma <hanghong...@amd.com>
Signed-off-by: Alex Hung <alex.h...@amd.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 4 ++--
 drivers/gpu/drm/amd/display/dc/dc_dsc.h                     | 3 ++-
 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c                 | 5 +++--
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 658584819d6e..358c4bff1c40 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -1146,7 +1146,7 @@ static int compute_mst_dsc_configs_for_link(struct 
drm_atomic_state *state,
                params[count].num_slices_v = 
aconnector->dsc_settings.dsc_num_slices_v;
                params[count].bpp_overwrite = 
aconnector->dsc_settings.dsc_bits_per_pixel;
                params[count].compression_possible = 
stream->sink->dsc_caps.dsc_dec_caps.is_dsc_supported;
-               dc_dsc_get_policy_for_timing(params[count].timing, 0, 
&dsc_policy);
+               dc_dsc_get_policy_for_timing(params[count].timing, 0, 
&dsc_policy, dc_link_get_highest_encoding_format(stream->link));
                if (!dc_dsc_compute_bandwidth_range(
                                stream->sink->ctx->dc->res_pool->dscs[0],
                                
stream->sink->ctx->dc->debug.dsc_min_slice_height_override,
@@ -1680,7 +1680,7 @@ static bool is_dsc_common_config_possible(struct 
dc_stream_state *stream,
 {
        struct dc_dsc_policy dsc_policy = {0};
 
-       dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy);
+       dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy, 
dc_link_get_highest_encoding_format(stream->link));
        dc_dsc_compute_bandwidth_range(stream->sink->ctx->dc->res_pool->dscs[0],
                                       
stream->sink->ctx->dc->debug.dsc_min_slice_height_override,
                                       dsc_policy.min_target_bpp * 16,
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dsc.h 
b/drivers/gpu/drm/amd/display/dc/dc_dsc.h
index 2a5120ecf48b..9014c2409817 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dsc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dsc.h
@@ -101,7 +101,8 @@ uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps(
  */
 void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,
                uint32_t max_target_bpp_limit_override_x16,
-               struct dc_dsc_policy *policy);
+               struct dc_dsc_policy *policy,
+               const enum dc_link_encoding_format link_encoding);
 
 void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit);
 
diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 
b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
index 79c426425911..ebd5df1a36e8 100644
--- a/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
+++ b/drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
@@ -883,7 +883,7 @@ static bool setup_dsc_config(
 
        memset(dsc_cfg, 0, sizeof(struct dc_dsc_config));
 
-       dc_dsc_get_policy_for_timing(timing, 
options->max_target_bpp_limit_override_x16, &policy);
+       dc_dsc_get_policy_for_timing(timing, 
options->max_target_bpp_limit_override_x16, &policy, link_encoding);
        pic_width = timing->h_addressable + timing->h_border_left + 
timing->h_border_right;
        pic_height = timing->v_addressable + timing->v_border_top + 
timing->v_border_bottom;
 
@@ -1173,7 +1173,8 @@ uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps(
 
 void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing,
                uint32_t max_target_bpp_limit_override_x16,
-               struct dc_dsc_policy *policy)
+               struct dc_dsc_policy *policy,
+               const enum dc_link_encoding_format link_encoding)
 {
        uint32_t bpc = 0;
 
-- 
2.34.1

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