The cortex-a8 arms are arm v7-a architecture.  L2 page table
entries have changed format.  The a8 includes trustzone, so
many registers have forked, producing a "secure" and a "nonsecure"
version of the register.  The arm v7-a manual is a 2,150-page pdf
file and the omap35x SoC manual is a 3,500-page pdf file; both
documents refer you to other documents for some details.  Some
co-processor control registers that used to exist to clear caches
and TLBs have vanished.  I'm sure there's more that I've blocked.

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