I'll try to track down an actual PCIe card rather than a simulator and
run down some numbers on Monday.
Paul
On 5-Dec-08, at 12:11 PM, ron minnich wrote:
On Fri, Dec 5, 2008 at 11:30 AM, Paul Lalonde <[EMAIL PROTECTED]>
wrote:
But random access patterns suck at being speculatively cached.
Linear access patterns still require reasonably careful work for
the caching
to do the right thing.
Expecting your entire frame buffer to be cached in L2 isn't
particularly
reasonable.
I'm pretty sure we can put some #s on this discussion. It's too
fuzzy for me.
Forget speculative reads, for now. Paul, what kind of time are you
seeing on your measurements to load a cache line over pcie from a
card?
ron
