On 6/3/21 5:33 PM, Alistair Francis wrote:
On Thu, Jun 3, 2021 at 9:38 AM Connor Davis <connojda...@gmail.com> wrote:
Add arch-specific makefiles and configs needed to build for
riscv. Also add a minimal head.S that is a simple infinite loop.
head.o can be built with
$ make XEN_TARGET_ARCH=riscv64 SUBSYSTEMS=xen -C xen tiny64_defconfig
$ make XEN_TARGET_ARCH=riscv64 SUBSYSTEMS=xen -C xen TARGET=riscv64/head.o
No other TARGET is supported at the moment.
Signed-off-by: Connor Davis <connojda...@gmail.com>
---
Bob: I moved back to XEN_TARGET_ARCH=riscv64 because supplying
just XEN_TARGET_ARCH=riscv causes TARGET_ARCH == TARGET_SUBARCH, and
that broke the build after the recent commit b6ecd5c8bc
"build: centralize / unify asm-offsets generation". It also deviates
from how x86 and arm work now, so I think this change is for the best
for now. That commit is also why the PHONY include target is added
in the riscv/Makefile.
---
MAINTAINERS | 8 +++++
config/riscv64.mk | 5 +++
xen/Makefile | 8 +++--
xen/arch/riscv/Kconfig | 47 +++++++++++++++++++++++++
xen/arch/riscv/Kconfig.debug | 0
xen/arch/riscv/Makefile | 2 ++
xen/arch/riscv/Rules.mk | 0
xen/arch/riscv/arch.mk | 14 ++++++++
xen/arch/riscv/configs/tiny64_defconfig | 13 +++++++
xen/arch/riscv/riscv64/asm-offsets.c | 0
xen/arch/riscv/riscv64/head.S | 6 ++++
xen/include/asm-riscv/config.h | 47 +++++++++++++++++++++++++
12 files changed, 148 insertions(+), 2 deletions(-)
create mode 100644 config/riscv64.mk
create mode 100644 xen/arch/riscv/Kconfig
create mode 100644 xen/arch/riscv/Kconfig.debug
create mode 100644 xen/arch/riscv/Makefile
create mode 100644 xen/arch/riscv/Rules.mk
create mode 100644 xen/arch/riscv/arch.mk
create mode 100644 xen/arch/riscv/configs/tiny64_defconfig
create mode 100644 xen/arch/riscv/riscv64/asm-offsets.c
create mode 100644 xen/arch/riscv/riscv64/head.S
create mode 100644 xen/include/asm-riscv/config.h
diff --git a/MAINTAINERS b/MAINTAINERS
index d46b08a0d2..956e71220d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -456,6 +456,14 @@ F: tools/libs/light/libxl_nonetbuffer.c
F: tools/hotplug/Linux/remus-netbuf-setup
F: tools/hotplug/Linux/block-drbd-probe
+RISCV
+M: Bob Eshleman <bobbyeshle...@gmail.com>
+R: Connor Davis <connojda...@gmail.com>
+S: Supported
+F: config/riscv64.mk
+F: xen/arch/riscv/
+F: xen/include/asm-riscv/
I volunteer to be a maintainer as well, feel free to say no :)
I did the QEMU RISC-V H extension port and have a pretty good
understanding of the RISC-V Hypervisor extension.
Great! I will add you.
+
RTDS SCHEDULER
M: Dario Faggioli <dfaggi...@suse.com>
M: Meng Xu <men...@cis.upenn.edu>
diff --git a/config/riscv64.mk b/config/riscv64.mk
new file mode 100644
index 0000000000..a5a21e5fa2
--- /dev/null
+++ b/config/riscv64.mk
@@ -0,0 +1,5 @@
+CONFIG_RISCV := y
+CONFIG_RISCV_64 := y
+CONFIG_RISCV_$(XEN_OS) := y
+
+CONFIG_XEN_INSTALL_SUFFIX :=
diff --git a/xen/Makefile b/xen/Makefile
index 7ce7692354..89879fad4c 100644
--- a/xen/Makefile
+++ b/xen/Makefile
@@ -26,7 +26,9 @@ MAKEFLAGS += -rR
EFI_MOUNTPOINT ?= $(BOOT_DIR)/efi
ARCH=$(XEN_TARGET_ARCH)
-SRCARCH=$(shell echo $(ARCH) | sed -e 's/x86.*/x86/' -e
s'/arm\(32\|64\)/arm/g')
+SRCARCH=$(shell echo $(ARCH) | \
+ sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g' \
+ -e s'/riscv.*/riscv/g')
# Don't break if the build process wasn't called from the top level
# we need XEN_TARGET_ARCH to generate the proper config
@@ -35,7 +37,8 @@ include $(XEN_ROOT)/Config.mk
# Set ARCH/SUBARCH appropriately.
export TARGET_SUBARCH := $(XEN_TARGET_ARCH)
export TARGET_ARCH := $(shell echo $(XEN_TARGET_ARCH) | \
- sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g')
+ sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g' \
+ -e s'/riscv.*/riscv/g')
# Allow someone to change their config file
export KCONFIG_CONFIG ?= .config
@@ -335,6 +338,7 @@ _clean: delete-unfresh-files
$(MAKE) $(clean) xsm
$(MAKE) $(clean) crypto
$(MAKE) $(clean) arch/arm
+ $(MAKE) $(clean) arch/riscv
$(MAKE) $(clean) arch/x86
$(MAKE) $(clean) test
$(MAKE) -f $(BASEDIR)/tools/kconfig/Makefile.kconfig ARCH=$(ARCH)
SRCARCH=$(SRCARCH) clean
diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig
new file mode 100644
index 0000000000..bd8381c5e0
--- /dev/null
+++ b/xen/arch/riscv/Kconfig
@@ -0,0 +1,47 @@
+config RISCV
+ def_bool y
+
+config RISCV_64
+ def_bool y
+ select 64BIT
+
+config ARCH_DEFCONFIG
+ string
+ default "arch/riscv/configs/tiny64_defconfig"
+
+menu "Architecture Features"
+
+source "arch/Kconfig"
+
+endmenu
+
+menu "ISA Selection"
+
+choice
+ prompt "Base ISA"
+ default RISCV_ISA_RV64IMA if RISCV_64
+ help
+ This selects the base ISA extensions that Xen will target.
+
+config RISCV_ISA_RV64IMA
+ bool "RV64IMA"
+ help
+ Use the RV64I base ISA, plus the "M" and "A" extensions
+ for integer multiply/divide and atomic instructions, respectively.
+
+endchoice
+
+config RISCV_ISA_C
+ bool "Compressed extension"
+ help
+ Add "C" to the ISA subsets that the toolchain is allowed to
+ emit when building Xen, which results in compressed instructions
+ in the Xen binary.
+
+ If unsure, say N.
I would change this to y if you are unsure. I don't expect any
hardware to have an MMU (yet along the H extension) and no compressed
instruction extension. Linux won't run without the C extension.
Otherwise looks good:
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Thanks. I was thinking it may make bring-up easier (at least in assembly
glue) if C was turned off, but in the end it will probably be easiest to
mimic
linux. I will change to Y.
Connor
