On 03.05.2021 21:28, Jason Andryuk wrote: > If HWP Energy_Performance_Preference isn't supported, the code falls > back to IA32_ENERGY_PERF_BIAS. Right now, we don't check > CPUID.06H:ECX.SETBH[bit 3] before using that MSR. The SDM reads like > it'll be available, and I assume it was available by the time Skylake > introduced HWP.
Upon more detailed reading of the respective SDM sections, I only see two options: Either you fail driver initialization if the bit is clear, or you correctly deal with the bit being clear. If Xen runs virtualized itself, the combination of CPUID bits set may not match that of any bare metal hardware that exists. Jan
