Hi Michal,
On 27/04/2021 10:35, Michal Orzel wrote:
AArch64 registers are 64bit whereas AArch32 registers
are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
we should get rid of helpers READ/WRITE_SYSREG32
in favour of using READ/WRITE_SYSREG.
We should also use register_t type when reading sysregs
which can correspond to uint64_t or uint32_t.
Even though many AArch64 registers have upper 32bit reserved
it does not mean that they can't be widen in the future.
Modify type of register cntkctl to register_t.
Modify accesses to thumbee registers to use READ/WRITE_SYSREG.
No need to change type of thumbee registers to register_t as they
only exist on arm32.
This is a bit ambiguous, I think in this context you mean it is only
usable by 32-bit domain but should really be only accessed on Armv7 as
they were restrospectively dropped on Armv8.
Signed-off-by: Michal Orzel <michal.or...@arm.com>
---
Changes since v1:
-Move modification of ACTLR into seperate patch
---
xen/arch/arm/domain.c | 18 +++++++++---------
xen/include/asm-arm/domain.h | 2 +-
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index bdd3d3e5b5..621f518b83 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -113,13 +113,13 @@ static void ctxt_switch_from(struct vcpu *p)
p->arch.tpidr_el1 = READ_SYSREG(TPIDR_EL1);
/* Arch timer */
- p->arch.cntkctl = READ_SYSREG32(CNTKCTL_EL1);
+ p->arch.cntkctl = READ_SYSREG(CNTKCTL_EL1);
virt_timer_save(p);
if ( is_32bit_domain(p->domain) && cpu_has_thumbee )
{
- p->arch.teecr = READ_SYSREG32(TEECR32_EL1);
- p->arch.teehbr = READ_SYSREG32(TEEHBR32_EL1);
+ p->arch.teecr = READ_SYSREG(TEECR32_EL1);
+ p->arch.teehbr = READ_SYSREG(TEEHBR32_EL1);
}
#ifdef CONFIG_ARM_32
@@ -175,7 +175,7 @@ static void ctxt_switch_from(struct vcpu *p)
static void ctxt_switch_to(struct vcpu *n)
{
- uint32_t vpidr;
+ register_t vpidr;
/* When the idle VCPU is running, Xen will always stay in hypervisor
* mode. Therefore we don't need to restore the context of an idle VCPU.
@@ -183,8 +183,8 @@ static void ctxt_switch_to(struct vcpu *n)
if ( is_idle_vcpu(n) )
return;
- vpidr = READ_SYSREG32(MIDR_EL1);
- WRITE_SYSREG32(vpidr, VPIDR_EL2);
+ vpidr = READ_SYSREG(MIDR_EL1);
+ WRITE_SYSREG(vpidr, VPIDR_EL2);
WRITE_SYSREG(n->arch.vmpidr, VMPIDR_EL2);
/* VGIC */
@@ -257,8 +257,8 @@ static void ctxt_switch_to(struct vcpu *n)
if ( is_32bit_domain(n->domain) && cpu_has_thumbee )
{
- WRITE_SYSREG32(n->arch.teecr, TEECR32_EL1);
- WRITE_SYSREG32(n->arch.teehbr, TEEHBR32_EL1);
+ WRITE_SYSREG(n->arch.teecr, TEECR32_EL1);
+ WRITE_SYSREG(n->arch.teehbr, TEEHBR32_EL1);
}
#ifdef CONFIG_ARM_32
@@ -274,7 +274,7 @@ static void ctxt_switch_to(struct vcpu *n)
/* This is could trigger an hardware interrupt from the virtual
* timer. The interrupt needs to be injected into the guest. */
- WRITE_SYSREG32(n->arch.cntkctl, CNTKCTL_EL1);
+ WRITE_SYSREG(n->arch.cntkctl, CNTKCTL_EL1);
virt_timer_restore(n);
}
diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
index 0a74df9931..c6b59ee755 100644
--- a/xen/include/asm-arm/domain.h
+++ b/xen/include/asm-arm/domain.h
@@ -190,7 +190,7 @@ struct arch_vcpu
struct vgic_cpu vgic;
/* Timer registers */
- uint32_t cntkctl;
+ register_t cntkctl;
struct vtimer phys_timer;
struct vtimer virt_timer;
--
Julien Grall
