On 21/12/2020 16:36, Jan Beulich wrote: > On 19.10.2020 04:47, Igor Druzhinin wrote: >> LBR, C-state MSRs and if_pschange_mc erratum applicability should correspond >> to Ice Lake desktop according to External Design Specification vol.2. >> >> Signed-off-by: Igor Druzhinin <[email protected]> >> --- >> Changes in v2: >> - keep partial sorting >> >> Andrew, since you have access to these documents, please review as you have >> time. > > Coming back to this - the recent SDM update inserted at least the > model numbers, but besides 6a it also lists 6c. Judging from the > majority of additions happening in pairs, I wonder whether we > couldn't (reasonably safely) add 6c then here as well. Of course > I still can't ack the change either way with access to just the > SDM...
I checked what 0x6c is and it appears to be Ice Lake-D (next gen Xeon D). The information from EDS vol.2 on Ice Lake-D available to us corresponds to what I got for Ice Lake X. So the numbers could be added here as soon as Andrew finds time to review that one. Igor
