Hi,
On 09/11/2020 08:21, Penny Zheng wrote:
CNTVCT_EL0 or CNTPCT_EL0 counter read in Cortex-A73 (all versions)
might return a wrong value when the counter crosses a 32bit boundary.
Until now, there is no case for Xen itself to access CNTVCT_EL0,
and it also should be the Guest OS's responsibility to deal with
this part.
But for CNTPCT, there exists several cases in Xen involving reading
CNTPCT, so a possible workaround is that performing the read twice,
and to return one or the other depending on whether a transition has
taken place.
Signed-off-by: Penny Zheng <penny.zh...@arm.com>
Acked-by: Julien Grall <jgr...@amazon.com>
On a related topic, do we need a fix similar to Linux commit
75a19a0202db "arm64: arch_timer: Ensure counter register reads occur
with seqlock held"?
Cheers,
--
Julien Grall
