> On 18 Aug 2020, at 15:10, Julien Grall <jul...@xen.org> wrote:
>
> Hi Bertrand,
>
> There is only one. So it should be erratum :).
True my years of latin are quite far ;-)
Anyway grep for errata in commit logs would be defeated if we put erratum
instead of errata.
>
> On 18/08/2020 14:47, Bertrand Marquis wrote:
>> Enable CPU errata of Speculative AT on the Neoverse N1 processor
>
> Ditto.
>
>> versions r0p0 to r2p0.
>> Also Fix Cortex A76 Errata string which had a wrong errata number.
>
> Ditto.
>
> And good catch for the typo :).
>
>> Signed-off-by: Bertrand Marquis <bertrand.marq...@arm.com>
>
> All the NITs can be fixed during commit:
>
> Acked-by: Julien Grall <jgr...@amazon.com>
Thanks
Bertrand
>
> Cheers,
>
>> ---
>> xen/arch/arm/cpuerrata.c | 8 +++++++-
>> 1 file changed, 7 insertions(+), 1 deletion(-)
>> diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c
>> index 0248893de0..6c09017515 100644
>> --- a/xen/arch/arm/cpuerrata.c
>> +++ b/xen/arch/arm/cpuerrata.c
>> @@ -476,9 +476,15 @@ static const struct arm_cpu_capabilities arm_errata[] =
>> {
>> .matches = has_ssbd_mitigation,
>> },
>> #endif
>> + {
>> + /* Neoverse r0p0 - r2p0 */
>> + .desc = "ARM erratum 1165522",
>> + .capability = ARM64_WORKAROUND_AT_SPECULATE,
>> + MIDR_RANGE(MIDR_NEOVERSE_N1, 0, 2 << MIDR_VARIANT_SHIFT),
>> + },
>> {
>> /* Cortex-A76 r0p0 - r2p0 */
>> - .desc = "ARM erratum 116522",
>> + .desc = "ARM erratum 1165522",
>> .capability = ARM64_WORKAROUND_AT_SPECULATE,
>> MIDR_RANGE(MIDR_CORTEX_A76, 0, 2 << MIDR_VARIANT_SHIFT),
>> },
>
> --
> Julien Grall
