Hi Jeff, On 21/01/2020 14:39, Jeff Kubascik wrote:
The VGICv3 module does not implement security extensions for guests. Furthermore, per the ARM Generic Interrupt Controller Architecture Specification (ARM IHI 0069E), section 9.9.15, the GICD_IGRPMODR register should be RAZ/WI to non-secure accesses when GICD_CTLR.DS = 0. This implements the GICD_IGRPMODR register for guest VMs as RAZ/WI, to avoid a data abort in the case the guest attempts to read or write the register.
Per the spec, all reserved registers should be RAZ/WI. So how about implementing the default case as read_as_zero/write_ignore?
This would also cover some problem that may arise with future Linux. I have actually been told that Linux will access registers (IIRC GICv4 specific) that may not have been implemented by Xen and should be RAZ/WI.
Cheers, -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
