On 10.10.2019 13:33, Roger Pau Monne wrote: > On Intel hardware there's currently no translation of already enabled > IO-APIC pins when interrupt remapping is enabled on the IOMMU, hence > introduce a logic similar to the one used in x2apic_bsp_setup in order > to save and mask all IO-APIC pins, and then translate and restore them > after interrupt remapping has been enabled. > > With this change the AMD specific logic to deal with enabled pins > (amd_iommu_setup_ioapic_remapping) can be removed, thus unifying the > handling of IO-APIC when enabling interrupt remapping regardless of > the IOMMU vendor. > > Reported-by: Andrew Cooper <andrew.coop...@citrix.com> > Signed-off-by: Roger Pau Monné <roger....@citrix.com>
The actual code change Reviewed-by: Jan Beulich <jbeul...@suse.com> but please mention here as well that the ExtInt case continues to be broken in the AMD case. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
