Hi Stefano,
On 7/30/19 10:26 PM, Stefano Stabellini wrote:
On Mon, 22 Jul 2019, Julien Grall wrote:
At the moment, HTTBR is setup in create_page_tables(). This is fine as
it is called by every CPUs.
However, such assumption may not hold in the future. To make change
easier, the HTTBR is not setup in enable_mmu().
Take the opportunity to add the missing isb() to ensure the HTTBR is
seen before the MMU is turned on.
Signed-off-by: Julien Grall <julien.gr...@arm.com>
---
Changes in v2:
- Patch added
---
xen/arch/arm/arm32/head.S | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index 6d55a2119a..8a1e272aab 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -373,8 +373,6 @@ create_page_tables:
/* Write Xen's PT's paddr into the HTTBR */
This comment needs to be moved
Good spot!
ldr r4, =boot_pgtable
add r4, r4, r10 /* r4 := paddr (boot_pagetable) */
- mov r5, #0 /* r4:r5 is paddr (boot_pagetable) */
- mcrr CP64(r4, r5, HTTBR)
Interestingly r5 is not clobbered by create_page_tables anymore, we need
to update the comment on top.
I knew documenting the clobbered registers are going to cause some
trouble when updating the code :). I will fix it in the next version.
Cheers,
--
Julien Grall
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