On 02/05/2019 09:25, Razvan Cojocaru wrote:
> On 5/2/19 2:57 AM, Tamas K Lengyel wrote:
>> Receiving this register is useful for introspecting 32-bit Windows
>> when the
>> event being trapped happened while in ring3.
>>
>> Signed-off-by: Tamas K Lengyel <ta...@tklengyel.com>
>> Cc: Razvan Cojocaru <rcojoc...@bitdefender.com>
>> Cc: Tamas K Lengyel <ta...@tklengyel.com>
>> Cc: Jan Beulich <jbeul...@suse.com>
>> Cc: Andrew Cooper <andrew.coop...@citrix.com>
>> Cc: Wei Liu <wei.l...@citrix.com>
>> Cc: Roger Pau Monne <roger....@citrix.com>
>> ---
>>   xen/arch/x86/vm_event.c       | 5 +++++
>>   xen/include/public/vm_event.h | 3 ++-
>>   2 files changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/xen/arch/x86/vm_event.c b/xen/arch/x86/vm_event.c
>> index 51c3493b1d..873788e32f 100644
>> --- a/xen/arch/x86/vm_event.c
>> +++ b/xen/arch/x86/vm_event.c
>> @@ -179,6 +179,10 @@ static void vm_event_pack_segment_register(enum
>> x86_segment segment,
>>           reg->es_sel = seg.sel;
>>           break;
>>   +    case x86_seg_gdtr:
>> +        reg->gdtr_base = seg.base;
>> +        break;
>
> Please also add limit, ar, sel, like the others do.

In Xen, we model GDTR/IDTR just like all other segments in the segment
cache for convenience/consistency, including faking up of some default
attributes.

However, there is no such thing as a selector or access rights for them,
and the VMCS lacks the fields, while the VMCB marks the fields as
reserved.   It is almost certainly not worth wasting the space in the ring.

~Andrew

P.S. If you consult the state-after-reset table in both SDMs, it does
state that Access Rights exist, and default to Present and R/W, but this
isn't a field which can be changed at any point.  I suspect real
pipelines model GDTR/LDTR just like the other segments for
simplification of the segmentation logic, which is why I chose to do the
same in Xen.

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