On 02/04/2019 17:14, Pu Wen wrote: > On 2019/4/2 23:46, Jan Beulich wrote: >> On 02.04.19 at 13:58, <pu...@hygon.cn> wrote: >>> On 2019/4/2 18:20, Jan Beulich wrote: >>>> On 02.04.19 at 08:46, <pu...@hygon.cn> wrote: >>>>> On 2019/4/1 16:41, Jan Beulich wrote: >>>>>> On 30.03.19 at 11:42, <pu...@hygon.cn> wrote: >>>>>>> There is no MSR_INTEL_PLATFORM_INFO for AMD and Hygon families. >>>>>>> So directly >>>>>>> return false in the function probe_cpuid_faulting() if >>>>>>> !cpu_has_hypervisor. >>>>>> >>>>>> I think it would have been nice if you had mentioned the real >>>>>> reason why you want to bypass the MSR accesses. This way it >>>>>> sounds as if the change was only cosmetic, and hence could be >>>>>> left out. >>>>> >>>>> Okay, how about the new description: >>>>> There is no MSR_INTEL_PLATFORM_INFO for AMD and Hygon families. Read >>>>> this MSR will stop the Xen initialization process >>>> >>>> "... for some early Hygon steppings"(?). I'm unaware of AMD CPUs >>> >>> Yes,for some early Hygon steppings. >>> >>>> having this issue - are you telling us otherwise? >>> >>> I tested with an AMD CPU(Family 17h, Model 1, Stepping 1) today, and >>> it also stopped when reading the MSR_INTEL_PLATFORM_INFO instead of >>> producing #GP(0). >> >> I've yet to try it out on my Rome system, but I have to admit I > > We have Rome system too, I'll have a try on it as well.
I've just spoken to a contact at AMD, and they've never encountered an issue like this. If it behaviour does manifest, then it is very concerning. ~Andrew _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
