On 14/03/2019 19:22, Simon Gaiser wrote: > Jason Andryuk: >> On Wed, Mar 13, 2019 at 11:09 AM Paul Durrant <paul.durr...@citrix.com> >> wrote: >>>> -----Original Message----- >>>> From: Jason Andryuk [mailto:jandr...@gmail.com] >>>> Sent: 11 March 2019 18:02 >>>> To: qemu-de...@nongnu.org >>>> Cc: xen-devel@lists.xenproject.org; marma...@invisiblethingslab.com; Simon >>>> Gaiser >>>> <si...@invisiblethingslab.com>; Jason Andryuk <jandr...@gmail.com>; >>>> Stefano Stabellini >>>> <sstabell...@kernel.org>; Anthony Perard <anthony.per...@citrix.com>; Paul >>>> Durrant >>>> <paul.durr...@citrix.com> >>>> Subject: [PATCH 6/6] xen-pt: Round pci regions sizes to XEN_PAGE_SIZE >>>> >>>> From: Simon Gaiser <si...@invisiblethingslab.com> >>>> >>>> If a pci memory region has a size < XEN_PAGE_SIZE it can get located at >>>> an address which is not page aligned. >>> IIRC the PCI spec says that the minimum memory region size should be at >>> least 4k. Should we even be tolerating BARs smaller than that? >>> >>> Paul >>> >> Hi, Paul. >> >> Simon found this, so it affects a real device. Simon, do you recall >> which device was affected? > Not sure which one it was. Probably the USB controller or the SD host > controller. As your example below shows this is not so uncommon.
The minimum is 128 bytes, not 4k - I've just checked the PCIe spec. Xen/Qemu definitely needs to cope with smaller than 4k if we want to be spec compliant. ~Andrew _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
