Hi,
On 26/01/2019 08:53, Amit Singh Tomar wrote:
As pointed out by Andre on the previous version, the commit message is missing.
Among things that a commit message could describe is:
- Link to the specification
- Why we don't need to initialize the UART. I know we discussed about it on the
previous version. But a summary is always helpful if someone looked at the code
in the future.
Signed-off-by: Amit Singh Tomar <amittome...@gmail.com>
---
TODO:
* Capture XEN boot info on WIKI(just forgot my
XEN Wiki credentials).
Changes since RFC:
* Replaced LDRH with LDR, with this there
is no scattered output on console now.
* Used tbnz instead of tst and b.ne.
* Used AML_ prefix against register names.
---
docs/misc/arm/early-printk.txt | 1 +
xen/arch/arm/arm64/debug-meson.inc | 51 ++++++++++++++++++++++++++++++++++++++
2 files changed, 52 insertions(+)
create mode 100644 xen/arch/arm/arm64/debug-meson.inc
diff --git a/docs/misc/arm/early-printk.txt b/docs/misc/arm/early-printk.txt
index f765f59..2aa9528 100644
--- a/docs/misc/arm/early-printk.txt
+++ b/docs/misc/arm/early-printk.txt
@@ -41,6 +41,7 @@ the name of the machine:
- juno: printk with pl011 on Juno platform
- lager: printk with SCIF0 on Renesas R-Car H2 processors
- midway: printk with the pl011 on Calxeda Midway processors
+ - meson: printk with the MESON for Amlogic S905 SoCs
You have dropped the platform alias. So the documentation should also be
dropped.
- mvebu: printk with the MVEBU for Marvell Armada 3700 SoCs
- omap5432: printk with UART3 on TI OMAP5432 processors
- rcar3: printk with SCIF2 on Renesas R-Car Gen3 processors
diff --git a/xen/arch/arm/arm64/debug-meson.inc
b/xen/arch/arm/arm64/debug-meson.inc
new file mode 100644
index 0000000..164bcdf
--- /dev/null
+++ b/xen/arch/arm/arm64/debug-meson.inc
@@ -0,0 +1,51 @@
+/*
+ * xen/arch/arm/arm64/debug-meson.inc
+ *
+ * MESON specific debug code.
+ *
+ * Copyright (c) 2019, Amit Singh Tomar <amittome...@gmail.com>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms and conditions of the GNU General Public
+ * License, version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this program; If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define AML_UART_WFIFO_REG 0x00
+#define AML_UART_STATUS_REG 0x0c
+
+#define AML_UART_TX_FIFO_FULL 21
+
+/*
+ * MESON UART wait UART to be ready to transmit
+ * xb: register which contains the UART base address
+ * c: scratch register
+ */
+.macro early_uart_ready xb c
+1:
+ ldr w\c, [\xb, #AML_UART_STATUS_REG] /* status register */
+ tbnz w\c, #AML_UART_TX_FIFO_FULL, 1b /* Check TXFIFO FULL
bit */
+.endm
+
+/*
+ * MESON UART transmit character
+ * xb: register which contains the UART base address
+ * wt: register which contains the character to transmit
+ */
+.macro early_uart_transmit xb wt
+ str \wt, [\xb, #AML_UART_WFIFO_REG]
+.endm
I will defer to Andre the review on the code.
Cheers,
--
Julien Grall
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