On 28/01/2019 12:50, Julien Grall wrote: > Hi all, > > Early version of Cortex-A76 can end-up with corrupt TLBs if they > speculate an AT instruction while the S1/S2 system registers are in an > inconsistent state. > > This can happen during guest context switch and when invalidating the > TLBs for other than the current VMID. > > The workaround implemented in Xen will: > - Use an empty stage-2 with a reserved VMID while context > switching between 2 guests > - Use an empty stage-2 with the VMID where TLBs need to > be flushed > > Cheers, > > CC: <jgr...@suse.com> > > Julien Grall (7): > xen/arm: Only set necessary flags when initializing HCR_EL2 > xen/arm: p2m: Provide an helper to generate the VTTBR > xen/arm: p2m: Introduce an helper to allocate the root page-table > xen/arm: domain_build: Don't switch to the guest P2M when copying data > xen/arm: p2m: Only use isb() when it is necessary > xen/arm: Implement workaround for Cortex-A76 erratum 1165522 > DO NOT APPLY Allow testing the new AT speculate workaround code > > docs/misc/arm/silicon-errata.txt | 1 + > xen/arch/arm/cpuerrata.c | 16 ++++++ > xen/arch/arm/domain.c | 8 ++- > xen/arch/arm/domain_build.c | 13 ----- > xen/arch/arm/p2m.c | 118 > +++++++++++++++++++++++++++++++++++---- > xen/arch/arm/traps.c | 8 ++- > xen/include/asm-arm/cpufeature.h | 3 +- > xen/include/asm-arm/processor.h | 2 + > 8 files changed, 139 insertions(+), 30 deletions(-) >
Release-acked-by: Juergen Gross <jgr...@suse.com> Juergen _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
