On 12/20/18 8:12 AM, Pu Wen wrote:
> The PMU architecture for the Hygon Dhyana CPU is similar to the AMD
> family 17h one. To support it, add Hygon Dhyana support in the similar
> way as AMD does.
>
> Signed-off-by: Pu Wen <pu...@hygon.cn>
> ---
> xen/arch/x86/cpu/vpmu.c | 2 ++
> xen/arch/x86/cpu/vpmu_amd.c | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/xen/arch/x86/cpu/vpmu.c b/xen/arch/x86/cpu/vpmu.c
> index 8a4f753..afd3607 100644
> --- a/xen/arch/x86/cpu/vpmu.c
> +++ b/xen/arch/x86/cpu/vpmu.c
> @@ -473,6 +473,7 @@ static int vpmu_arch_initialise(struct vcpu *v)
>
> switch ( vendor )
> {
> + case X86_VENDOR_HYGON:
> case X86_VENDOR_AMD:
> ret = svm_vpmu_initialise(v);
> break;
> @@ -890,6 +891,7 @@ static int __init vpmu_init(void)
>
> switch ( vendor )
> {
> + case X86_VENDOR_HYGON:
> case X86_VENDOR_AMD:
> if ( amd_vpmu_init() )
> vpmu_mode = XENPMU_MODE_OFF;
> diff --git a/xen/arch/x86/cpu/vpmu_amd.c b/xen/arch/x86/cpu/vpmu_amd.c
> index 5efc39b..e9f0a5c 100644
> --- a/xen/arch/x86/cpu/vpmu_amd.c
> +++ b/xen/arch/x86/cpu/vpmu_amd.c
> @@ -554,6 +554,8 @@ int __init amd_vpmu_init(void)
> case 0x12:
> case 0x14:
> case 0x16:
> + case 0x17:
> + case 0x18:
This also enables VPMU support for Zen which goes beyond what the
commit message claims to do.
Also, why are you choosing to use legacy MSRs (and you did the same in
Linux)? Doesn't Zen (which you are saying is similar to Hygon) support
c001_020X bank?
-boris
> num_counters = F10H_NUM_COUNTERS;
> counters = AMD_F10H_COUNTERS;
> ctrls = AMD_F10H_CTRLS;
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
