On 12/10/18 16:58, Jan Beulich wrote: > First of all, hvm_intsrc_mce was not considered here at all, yet nothing > blocks #MC (other than an already in-progress #MC, but dealing with this > is not the purpose of this patch).
I don't believe we've got sufficient infrastructure to fix this reasonably yet, but for the record, the real behaviour for MCEs is: If intel broadcast to every thread covered by the MCE bank else if AMD sent to the thread with the lowest id covered by the MCE bank When trying to inject: if !CR4.MCE or MCG_STATUS.MCIP shutdown Furthermore, I believe even #MC is blocked by the MOVSS shadow, because the purpose of the shadow is to indicate "my stack is not safe to take an exception". > Additionally STI-shadow only blocks maskable interrupts, but not NMI. This has been discussed on LKML in the past, but `STI; HLT` will deadlock if NMIs don't respect the STI shadow. An NMI which hits that instruction boundary will IRET with IF clear, at which point the core will halt and never wake up. I believe the input from the vendor architects was that some very old cores suffer from this problem, but anything you can get yours hand on today will respect the STI shadow. ~Andrew _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
