Hello guys,
mapping on my system is:
dom0 have one vCPU and it is pinned on pCPU0
domU also have one vCPU and it's pinned for pCPU2

I removed only vwfi=native and everything works fine. I can destroy
and create a guest as many times as I want with out any error (still
using sched=null).

These are xen bootargs in Xen-overlay.dtsi file:
 xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=768M
bootscrub=0 maxcpus=1 dom0_max_vcpus=1 dom0_vcpus_pin=true
timer_slop=0 core_parking=performance cpufreq=xen:performance
sched=null";

There is whole xen-overlay.dtsi file included in attachment.

Purpose of my work is implementing xen on UltraZed-EG board with
maximum performance (and lowest jitter, which is why I'm using null
scheduler and "hard" vcpu pinning) which is my master's thesis on
faculty. By removing vwfi=native I'm not getting the best performance,
right? vwfi=native should decrease interrupt latency by ~60% as I read
here:

https://blog.xenproject.org/author/stefano-stabellini/

Big thanks to Julien for having a look!
/ {
        chosen {
                #address-cells = <2>;
                #size-cells = <1>;

                xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=768M 
bootscrub=0 maxcpus=1 dom0_max_vcpus=1 dom0_vcpus_pin=true timer_slop=0 
core_parking=performance cpufreq=xen:performance sched=null";
                xen,dom0-bootargs = "console=hvc0 earlycon=xen earlyprintk=xen 
maxcpus=1 clk_ignore_unused";

                dom0 {
                        compatible = "xen,linux-zimage", "xen,multiboot-module";
                        reg = <0x0 0x80000 0x3100000>;
                };
        };

};

&smmu {
        status = "okay";
        mmu-masters = < &gem0 0x874
                        &gem1 0x875
                        &gem2 0x876
                        &gem3 0x877
                        &dwc3_0 0x860
                        &dwc3_1 0x861
                        &qspi 0x873
                        &lpd_dma_chan1 0x868
                        &lpd_dma_chan2 0x869
                        &lpd_dma_chan3 0x86a
                        &lpd_dma_chan4 0x86b
                        &lpd_dma_chan5 0x86c
                        &lpd_dma_chan6 0x86d
                        &lpd_dma_chan7 0x86e
                        &lpd_dma_chan8 0x86f
                        &fpd_dma_chan1 0x14e8
                        &fpd_dma_chan2 0x14e9
                        &fpd_dma_chan3 0x14ea
                        &fpd_dma_chan4 0x14eb
                        &fpd_dma_chan5 0x14ec
                        &fpd_dma_chan6 0x14ed
                        &fpd_dma_chan7 0x14ee
                        &fpd_dma_chan8 0x14ef
                        &sdhci0 0x870
                        &sdhci1 0x871
                        &nand0 0x872>;
};

&uart1 {
   xen,passthrough = <0x1>;
};

&gpio {
   xen,passthrough = <0x1>;
};
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