01: support AVX512 opmask insns
02: x86/HVM: grow MMIO cache data size to 64 bytes
03: correct EVEX decoding
04: generalize vector length handling for AVX512/EVEX
05: support basic AVX512 moves
06: test for correct EVEX Disp8 scaling
07: use AVX512 logic for emulating V{,P}MASKMOV*
08: support AVX512F legacy-equivalent arithmetic FP insns
09: support AVX512DQ logic FP insns
10: support AVX512F "normal" FP compare insns
11: support AVX512F misc legacy-equivalent FP insns
12: support AVX512F fused-multiply-add insns
13: support AVX512F legacy-equivalent logic insns
14: support AVX512{F,DQ} FP broadcast insns
15: support AVX512F v{,u}comis{d,s} insns
16: test: introduce eq()
17: support AVX512{F,BW} packed integer compare insns
18: support AVX512{F,BW} packed integer arithmetic insns
19: use simd_128 also for legacy vector shift insns
20: support AVX512{F,BW} shift/rotate insns
21: support AVX512{F,BW,DQ} extract insns
22: support AVX512{F,BW,DQ} insert insns
23: basic AVX512F testing
24: support AVX512{F,BW,DQ} integer broadcast insns
25: basic AVX512VL testing
26: support AVX512{F,BW} zero- and sign-extending moves
27: support AVX512{F,BW} down conversion moves
28: support AVX512{F,BW} integer unpack insns
29: support AVX512{F,BW,_VBMI} full permute insns
30: support AVX512{F,BW} integer shuffle insns
31: support AVX512{BW,DQ} mask move insns
32: basic AVX512BW testing
33: basic AVX512DQ testing
34: also allow running the 32-bit harness on a 64-bit distroThe main goal of this series is to support enough of the instructions such that basic AVX512F, AVX512BW, AVX512DQ, and AVX512VL tests can be run (this set is relevant as a basis in particular due to it together mostly [entirely?] covering the legacy-equivalent AVX512 insns). Later additions then may simply enable further of the (conditional) tests in simd*.c (or by other means). Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
