On 18/11/2025 3:07 pm, Jan Beulich wrote: > Use the respective host CPU policy bit instead. > > Signed-off-by: Jan Beulich <[email protected]>
Right now, the synthetic features get levelled across the system. Now, we take the BSP's copy. This change is broadly fine, but it does need mentioning in the commit message. One thing we may want to do is take greater care to get the masking/levelling MSRs properly level. Right now, if they're asymmetric for any reason, we would previously end up using the common subset. > --- a/xen/arch/x86/cpu/common.c > +++ b/xen/arch/x86/cpu/common.c > @@ -523,10 +523,6 @@ static void generic_identify(struct cpui > if ( cpu_has(c, X86_FEATURE_CLFLUSH) ) > c->x86_clflush_size = ((ebx >> 8) & 0xff) * 8; > > - if ( (c->cpuid_level >= CPUID_PM_LEAF) && > - (cpuid_ecx(CPUID_PM_LEAF) & CPUID6_ECX_APERFMPERF_CAPABILITY) ) > - __set_bit(X86_FEATURE_APERFMPERF, c->x86_capability); > - > /* AMD-defined flags: level 0x80000001 */ > if (c->extended_cpuid_level >= 0x80000001) > cpuid(0x80000001, &tmp, &tmp, > --- a/xen/arch/x86/include/asm/cpufeature.h > +++ b/xen/arch/x86/include/asm/cpufeature.h > @@ -11,7 +11,9 @@ > #include <xen/macros.h> > > #ifndef __ASSEMBLY__ > +#include <asm/cpu-policy.h> > #include <asm/cpuid.h> > +#include <xen/lib/x86/cpu-policy.h> Why both? ~Andrew
