On Mon, Aug 04, 2025 at 03:42:47PM +0300, Leon Romanovsky wrote: > From: Leon Romanovsky <leo...@nvidia.com> > > In case peer-to-peer transaction traverses through host bridge, > the IOMMU needs to have IOMMU_MMIO flag, together with skip of > CPU sync. > > The latter was handled by provided DMA_ATTR_SKIP_CPU_SYNC flag, > but IOMMU flag was missed, due to assumption that such memory > can be treated as regular one. > > Reuse newly introduced DMA attribute to properly take MMIO path. > > Signed-off-by: Leon Romanovsky <leo...@nvidia.com> > --- > mm/hmm.c | 15 ++++++++------- > 1 file changed, 8 insertions(+), 7 deletions(-) > > diff --git a/mm/hmm.c b/mm/hmm.c > index 015ab243f0813..6556c0e074ba8 100644 > --- a/mm/hmm.c > +++ b/mm/hmm.c > @@ -746,7 +746,7 @@ dma_addr_t hmm_dma_map_pfn(struct device *dev, struct > hmm_dma_map *map, > case PCI_P2PDMA_MAP_NONE: > break; > case PCI_P2PDMA_MAP_THRU_HOST_BRIDGE: > - attrs |= DMA_ATTR_SKIP_CPU_SYNC; > + attrs |= DMA_ATTR_MMIO; > pfns[idx] |= HMM_PFN_P2PDMA; > break;
Yeah, this is a lot cleaner Reviewed-by: Jason Gunthorpe <j...@nvidia.com> Jason