On 25/06/2025 11:28, Jahan Murudi wrote:
Hi Michal,
Hi Jahan,
Thank you for your review and the Ack.
+ dsb(sy);
Any clue why Linux (mainline) does not do that?
One process remark, we typically comment inline rather than pasting a
quote and replying at the top of the e-mail.
The implementation writel() which contains an implicit dsb(st) which likely
sufficient for Linux for its Stage-1 IOMMU usage where CPU and IOMMU
interactions are coherent.
However, Xen uses the IPMMU as a Stage-2 IOMMU for non-coherent DMA operations
(such as PCIe passthrough), requiring the stronger dsb(sy) to ensure writes
fully propagate to the IPMMU hardware before continuing.
I don't follow. Are you saying the IPMMU driver in Linux doesn't
non-coherent DMA operations?
But even if that's the case, I still don't see why non-coherent DMA
would matter. From my understanding, here we want to make sure the TLB
walker sees the change before the flush.
So if the TLB walker is coherent with the rest of the system. Then it
would be similar to the CPU TLBs where we only need a "dsb st" (well we
use "nshst" because the TLB is in non-shareable domain).
If the walker is not coherent, then that's a different topic.
Anyway, I am not against using "dsb(sy)". It is stronger than necessary
but also probably not a massive deal in the TLB flush path.
Cheers,
--
Julien Grall
