On 2025-06-16 08:59, Jan Beulich wrote:
Before we start actually adjusting behavior when ERMS is available, follow Linux commit 161ec53c702c ("x86, mem, intel: Initialize Enhanced REP MOVSB/STOSB") and zap the CPUID-derived feature flag when the MSR bit is clear. Don't extend the artificial clearing to guest view, though: Guests can take their own decision in this regard, as they can read (most of) MISC_ENABLE.Signed-off-by: Jan Beulich <jbeul...@suse.com>
Reviewed-by: Jason Andryuk <jason.andr...@amd.com>
