Hi Ayan, > On 8 Apr 2025, at 14:32, Ayan Kumar Halder <ayank...@amd.com> wrote: > > Hi Luca, > > On 07/04/2025 10:14, Luca Fancellu wrote: >> CAUTION: This message has originated from an External Source. Please use >> proper judgment and caution when opening attachments, clicking links, or >> responding to this email. >> >> >> Implement the function setup_mpu that will logically track the MPU >> regions defined by hardware registers, start introducing data >> structures and functions to track the status from the C world. >> >> The xen_mpumap_mask bitmap is used to track which MPU region are >> enabled at runtime. >> >> This function is called from setup_mm() which full implementation >> will be provided in a later stage. >> >> Signed-off-by: Luca Fancellu <luca.fance...@arm.com> >> --- >> xen/arch/arm/include/asm/arm64/mpu.h | 2 ++ >> xen/arch/arm/mpu/mm.c | 49 +++++++++++++++++++++++++++- >> 2 files changed, 50 insertions(+), 1 deletion(-) >> >> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h >> b/xen/arch/arm/include/asm/arm64/mpu.h >> index 7cf8d355a1af..ff5a957bf085 100644 >> --- a/xen/arch/arm/include/asm/arm64/mpu.h >> +++ b/xen/arch/arm/include/asm/arm64/mpu.h >> @@ -6,6 +6,8 @@ >> #ifndef __ARM_ARM64_MPU_H__ >> #define __ARM_ARM64_MPU_H__ >> >> +#define PRENR_MASK GENMASK(31, 0) > This can be moved to xen/arch/arm/include/asm/mpu.h
I can see from the Arm® Cortex®-R52 Processor TRM, r1p1, 3.3.46 Hyp MPU Region Enable Register, that HPRENR can have 16/20/24 enabled bits, the rest is RAZ. Because of that I’ve put that here, maybe you should implement it in the arm32 part since you have this difference from Arm64. Cheers, Luca
