> On 17 Mar 2025, at 09:51, Orzel, Michal <michal.or...@amd.com> wrote: > > > > On 17/03/2025 10:33, Luca Fancellu wrote: >> >> >> Hi Michal, >> >>> On 17 Mar 2025, at 09:29, Orzel, Michal <michal.or...@amd.com> wrote: >>> >>> >>> >>> On 16/03/2025 20:24, Luca Fancellu wrote: >>>> >>>> >>>> Introduce frame_table in order to provide the implementation of >>>> virt_to_page for MPU system, move the MMU variant in mmu/mm.h. >>>> >>>> Introduce FRAMETABLE_NR that is required for 'pdx_group_valid' in >>>> pdx.c, but leave the initialisation of the frame table to a later >>>> stage. >>>> Define FRAMETABLE_SIZE for MPU to support up to 1TB of ram, as the >>>> only current implementation of armv8-r aarch64, which is cortex R82, >>>> can address up to that memory. >>> When mentioning support statements like this one, it'd be beneficial to >>> provide >>> a reference to a doc of some sort. >> >> So the only reference I have is this: >> https://developer.arm.com/Processors/Cortex-R82 >> >> but I would not be confident to use the link in the commit message as it >> could go stale >> very quickly. So I’m not sure about what I can do more. > Well, not really. Max physical memory is advertised via ID_AA64MMFR0_EL1. I > found some old R82 technical manual (you can surely find the latest one and > provide reference to it - not the web page) and indeed it mentions PARange as > 0b0010 which is 40bit which is 1TB. With the R82 being the only CPU model > implementing ARMv8R-AArch64, that's solid information.
Right, I forgot about it, thanks for pointing that out, I’ll add a reference about it Cheers, Luca