On 2025-03-02 15:55, Ryan Roberts wrote:
> Since commit 38e0edb15bd0 ("mm/apply_to_range: call pte function with
> lazy updates") it's been possible for arch_[enter|leave]_lazy_mmu_mode()
> to be called without holding a page table lock (for the kernel mappings
> case), and therefore it is possible that preemption may occur while in
> the lazy mmu mode. The Sparc lazy mmu implementation is not robust to
> preemption since it stores the lazy mode state in a per-cpu structure
> and does not attempt to manage that state on task switch.
>
> Powerpc had the same issue and fixed it by explicitly disabling
> preemption in arch_enter_lazy_mmu_mode() and re-enabling in
> arch_leave_lazy_mmu_mode(). See commit b9ef323ea168 ("powerpc/64s:
> Disable preemption in hash lazy mmu mode").
>
> Given Sparc's lazy mmu mode is based on powerpc's, let's fix it in the
> same way here.
>
> Fixes: 38e0edb15bd0 ("mm/apply_to_range: call pte function with lazy updates")
> Signed-off-by: Ryan Roberts <ryan.robe...@arm.com>
> ---
> arch/sparc/mm/tlb.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/sparc/mm/tlb.c b/arch/sparc/mm/tlb.c
> index 8648a50afe88..a35ddcca5e76 100644
> --- a/arch/sparc/mm/tlb.c
> +++ b/arch/sparc/mm/tlb.c
> @@ -52,8 +52,10 @@ void flush_tlb_pending(void)
>
> void arch_enter_lazy_mmu_mode(void)
> {
> - struct tlb_batch *tb = this_cpu_ptr(&tlb_batch);
> + struct tlb_batch *tb;
>
> + preempt_disable();
> + tb = this_cpu_ptr(&tlb_batch);
> tb->active = 1;
> }
>
> @@ -64,6 +66,7 @@ void arch_leave_lazy_mmu_mode(void)
> if (tb->tlb_nr)
> flush_tlb_pending();
> tb->active = 0;
> + preempt_enable();
> }
>
> static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,
Acked-by: Andreas Larsson <andr...@gaisler.com>
Thanks,
Andreas
