From: Andrew Cooper <andrew.coop...@citrix.com> Signed-off-by: Andrew Cooper <andrew.coop...@citrix.com> Signed-off-by: Oleksii Kurochko <oleksii.kuroc...@gmail.com> --- Changes in v8: - New patch. It was taken from https://lore.kernel.org/xen-devel/50cd2332-11b7-4b64-85ea-489c41609...@citrix.com/T/#t with applying the comments: - Introduce BITS_PER_INT. - s/arch_heightl/arch_hweightl --- xen/arch/riscv/include/asm/bitops.h | 7 +++++++ xen/arch/riscv/include/asm/config.h | 4 ++++ 2 files changed, 11 insertions(+)
diff --git a/xen/arch/riscv/include/asm/bitops.h b/xen/arch/riscv/include/asm/bitops.h index d22eec1e87..72a4a8c155 100644 --- a/xen/arch/riscv/include/asm/bitops.h +++ b/xen/arch/riscv/include/asm/bitops.h @@ -125,6 +125,13 @@ static inline void clear_bit(int nr, volatile void *p) #undef NOT #undef __AMO +#define arch_ffs(x) ((x) ? 1 + __builtin_ctz(x) : 0) +#define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0) +#define arch_fls(x) ((x) ? BITS_PER_INT - __builtin_clz(x) : 0) +#define arch_flsl(x) ((x) ? BITS_PER_LONG - __builtin_clzl(x) : 0) + +#define arch_hweightl(x) __builtin_popcountl(x) + #endif /* ASM__RISCV__BITOPS_H */ /* diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h index 826e5c7172..7141bd9e46 100644 --- a/xen/arch/riscv/include/asm/config.h +++ b/xen/arch/riscv/include/asm/config.h @@ -119,6 +119,7 @@ #define HYPERVISOR_VIRT_START XEN_VIRT_START #if defined(CONFIG_RISCV_64) +# define INT_BYTEORDER 2 # define LONG_BYTEORDER 3 # define ELFSIZE 64 # define MAX_VIRT_CPUS 128u @@ -126,6 +127,9 @@ # error "Unsupported RISCV variant" #endif +#define BYTES_PER_INT (1 << INT_BYTEORDER) +#define BITS_PER_INT (BYTES_PER_INT << 3) + #define BYTES_PER_LONG (1 << LONG_BYTEORDER) #define BITS_PER_LONG (BYTES_PER_LONG << 3) #define POINTER_ALIGN BYTES_PER_LONG -- 2.48.1
