On 13/02/2025 16:37, Volodymyr Babchuk wrote:
>
>
> ARM Architecture Reference Manual states that IL field of ESR_EL1
> register should be 1 in some cases, and all these cases are covered by
> inject_abt64_exception()
>
> Section D24.2.40, page D24-7337 of ARM DDI 0487L:
>
> IL, bit [25]
> Instruction Length for synchronous exceptions. Possible values of this bit
> are:
>
> [...]
>
> 0b1 - 32-bit instruction trapped.
> This value is also used when the exception is one of the following:
> [...]
> - An Instruction Abort exception.
> - A Data Abort exception for which the value of the ISV bit is 0.
> [...]
>
> inject_abt64_exception() function injects either Instruction Abort or
> Data Abort exception. In both cases, ISS is 0, which means that ISV
> bit is 0 as well. Thus, IL must be set to 1 unconditionally.
>
> To align code with the specification, set .len field to 1 in
> inject_abt64_exception() and remove unneeded third parameter.
>
> Signed-off-by: Volodymyr Babchuk <volodymyr_babc...@epam.com>
Reviewed-by: Michal Orzel <michal.or...@amd.com>
~Michal
