On Wed, 15 Jan 2025, Mykyta Poturai wrote: > From: Oleksandr Andrushchenko <oleksandr_andrushche...@epam.com> > > There are number of ITS implementations exist which are different from > the base one which have number of functionalities defined as is > "IMPLEMENTATION DEFINED", e.g. there may exist differences in cacheability, > shareability and memory requirements and others. This requires > appropriate handling of such HW requirements which are implemented as > ITS quirks: GITS_IIDR (ITS Implementer Identification Register) is used to > differentiate the ITS implementations and select appropriate set of > quirks if any. > > As an example of such ITSes add quirk implementation for Renesas Gen4 ITS: > - add possibility to override default cacheability and shareability > settings used for ITS memory allocations; > - change relevant memory allocations to alloc_xenheap_pages which allows > to specify memory access flags, free_xenheap_pages is used to free; > - add quirks validation to ensure that all ITSes share the same quirks > in case of multiple ITSes are present in the system; > > The Gen4 ITS memory requirements are not covered in any errata as of yet, > but observed behavior suggests that they are indeed required. > > The idea of the quirk implementation is inspired by the Linux kernel ITS > quirk implementation [1]. > > Changelog: > v2 -> v3: > - added missing memset; > v1 -> v2: > - switched to using alloc_xenheap_pages/free_xenheap_pages for ITS memory > allocations; > - updated declaration of its_quirk_flags; > - added quirks validation to ensure that all ITSes share the same quirks; > - removed unnecessary vITS changes; > > > Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushche...@epam.com> > Signed-off-by: Mykyta Poturai <mykyta_potu...@epam.com> > > [1] > https://elixir.bootlin.com/linux/v5.16.1/source/drivers/irqchip/irq-gic-v3-its.c
Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
