On Mon, Jul 02, 2018 at 10:57:26AM +0100, Andrew Cooper wrote:
> These MSRs are non-architectural and the available booleans were used in lieu
> of an architectural signal of availability. The MSRs are unconditionally
> available to HVM guests, but currently for PV guests, are hidden when CPUID
> faulting is unavailable.
>
> However, in hindsight, the additional booleans make toolstack MSR interactions
> more complicated. As the behaviour of the MSRs is reserved when unavailable,
> unconditionally letting the MSRs be accessible is compatible behaviour, even
> for PV guests.
>
> The new behaviour is:
> * PLATFORM_INFO is unconditionally readable even for PV guests and will
> indicate the presense or absense of CPUID Faulting in bit 31.
> * MISC_FEATURES_ENABLES is uncondtionally readable, and bit 0 may be set iff
> PLATFORM_INFO reports that CPUID Faulting is available.
>
> Signed-off-by: Andrew Cooper <andrew.coop...@citrix.com>
Reviewed-by: Roger Pau Monné <roger....@citrix.com>
> ---
> CC: Jan Beulich <jbeul...@suse.com>
> CC: Wei Liu <wei.l...@citrix.com>
> CC: Roger Pau Monné <roger....@citrix.com>
> CC: Sergey Dyasli <sergey.dya...@citrix.com>
> ---
> xen/arch/x86/cpu/common.c | 1 -
> xen/arch/x86/msr.c | 30 +-----------------------------
> xen/include/asm-x86/msr.h | 2 --
> 3 files changed, 1 insertion(+), 32 deletions(-)
>
> diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
> index 3548b12..b9ff6f8 100644
> --- a/xen/arch/x86/cpu/common.c
> +++ b/xen/arch/x86/cpu/common.c
> @@ -119,7 +119,6 @@ bool __init probe_cpuid_faulting(void)
> {
> struct msr_domain_policy *dp = &raw_msr_domain_policy;
>
> - dp->plaform_info.available = true;
> if (val & MSR_PLATFORM_INFO_CPUID_FAULTING)
> dp->plaform_info.cpuid_faulting = true;
To reduce code size:
dp->plaform_info.cpuid_faulting = val & MSR_PLATFORM_INFO_CPUID_FAULTING;
Roger.
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