On 21.10.2024 13:10, Andrew Cooper wrote: > On 18/10/2024 9:08 am, Roger Pau Monne wrote: >> When using AMD-VI interrupt remapping the vector field in the IO-APIC RTE is >> repurposed to contain part of the offset into the remapping table. Previous >> to >> 2ca9fbd739b8 Xen had logic so that the offset into the interrupt remapping >> table would match the vector. Such logic was mandatory for end of interrupt >> to >> work, since the vector field (even when not containing a vector) is used by >> the >> IO-APIC to find for which pin the EOI must be performed. >> >> Introduce a table to store the EOI handlers when using interrupt remapping, >> so >> that the IO-APIC driver can translate pins into EOI handlers without having >> to >> read the IO-APIC RTE entry. Note that to simplify the logic such table is >> used >> unconditionally when interrupt remapping is enabled, even if strictly it >> would >> only be required for AMD-Vi. >> >> Reported-by: Willi Junga <xenproj...@ymy.be> >> Suggested-by: David Woodhouse <d...@amazon.co.uk> >> Fixes: 2ca9fbd739b8 ('AMD IOMMU: allocate IRTE entries instead of using a >> static mapping') >> Signed-off-by: Roger Pau Monné <roger....@citrix.com> > > Yet more fallout from the multi-MSI work. That really has been a giant > source of bugs.
If there's a connection to the multi-MSI work (which I don't see), the Fixes: tag would likely need adjusting. Jan