On 21/10/2024 10:55 am, Alejandro Vallejo wrote: > On Fri Oct 18, 2024 at 9:08 AM BST, Roger Pau Monne wrote: >> When using AMD-VI interrupt remapping the vector field in the IO-APIC RTE is >> repurposed to contain part of the offset into the remapping table. Previous >> to > For my own education. Is that really a repurpose? Isn't the RTE vector field > itself simply remapped, just like any MSI?
Yes, it really is repurposed. The vector field has a different meaning under IR, and indeed different meanings between Intel and AMD. The way you're supposed to use interrupt remapping is to set up a static configuration in the device (inc IO-APIC in this case), and then (only) edit the IO-RTE in the IOMMU to change destination/vector. This avoids needing to do CFG/MMIO cycles to move interrupt affinity, not to mention the corner cases involved with doing so. ~Andrew
