On Wed, Jun 20, 2018 at 04:42:32PM +0200, Roger Pau Monne wrote: > To be queued in vpci_vcpu. This will be required for SR-IOV support, > which uses a single control register bit to toggle memory decoding for > all the virtual functions. > > No functional change expected. > > Signed-off-by: Roger Pau Monné <roger....@citrix.com>
Reviewed-by: Wei Liu <wei.l...@citrix.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
