On 19.06.2024 09:45, Jan Beulich wrote: > On 18.06.2024 20:31, Andrew Cooper wrote: >> I've finally found the bit in the AMD IOMMU spec which says 64bit accesses >> are >> permitted: >> >> 3.4 IOMMU MMIO Registers: >> >> Software access to IOMMU registers may not be larger than 64 bits. Accesses >> must be aligned to the size of the access and the size in bytes must be a >> power of two. Software may use accesses as small as one byte. > > I take it that the use of 32-bit writes was because of the past need > also work in a 32-bit hypervisor, not because of perceived restrictions > by the spec.
In fact it looks like we're already halfway through converting to writeq(). Jan
