Hi Julien,
> On 19 Jun 2023, at 19:01, Julien Grall <jul...@xen.org> wrote:
>
> From: Julien Grall <jgr...@amazon.com>
>
> Per the Arm Arm (ARM DDI 0406C.d A3.8.3):
>
> "The DMB and DSB memory barriers affect reads and writes to the memory
> system generated by load/store instructions and data or unified cache
> maintenance operations being executed by the processor. Instruction
> fetches or accesses caused by a hardware translation table access are
> not explicit accesses."
>
> The function switch_to_runtime_mapping() is responsible to map the
> Xen at its runtime address if we were using the temporary area before
> jumping returning using a runtime address. So we need to ensure the
> 'dsb' has completed before continuing. Therefore add an 'isb'.
>
> Fixes: fbd9b5fb4c26 ("xen/arm32: head: Remove restriction where to load Xen")
> Signed-off-by: Julien Grall <jgr...@amazon.com>
Reviewed-by: Bertrand Marquis <bertrand.marq...@arm.com>
Cheers
Bertrand
> ---
> xen/arch/arm/arm32/head.S | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
> index 6ca3329138e3..b942e7e54d08 100644
> --- a/xen/arch/arm/arm32/head.S
> +++ b/xen/arch/arm/arm32/head.S
> @@ -656,6 +656,11 @@ switch_to_runtime_mapping:
>
> /* Ensure any page table updates are visible before continuing */
> dsb nsh
> + /*
> + * The function will return on the runtime mapping. So we want
> + * to prevent instruction fetch before the dsb completes.
> + */
> + isb
>
> ready_to_switch:
> mov pc, lr
> --
> 2.40.1
>
