On 16/05/2023 3:58 pm, Jan Beulich wrote:
> On 15.05.2023 16:42, Andrew Cooper wrote:
>> --- a/xen/arch/x86/cpu-policy.c
>> +++ b/xen/arch/x86/cpu-policy.c
>> @@ -408,6 +408,25 @@ static void __init calculate_host_policy(void)
>> p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting;
>> }
>>
>> +static void __init guest_common_max_feature_adjustments(uint32_t *fs)
>> +{
>> + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
>> + {
>> + /*
>> + * MSR_ARCH_CAPS is just feature data, and we can offer it to guests
>> + * unconditionally, although limit it to Intel systems as it is
>> highly
>> + * uarch-specific.
>> + *
>> + * In particular, the RSBA and RRSBA bits mean "you might migrate
>> to a
>> + * system where RSB underflow uses alternative predictors (a.k.a
>> + * Retpoline not safe)", so these need to be visible to a guest in
>> all
>> + * cases, even when it's only some other server in the pool which
>> + * suffers the identified behaviour.
>> + */
>> + __set_bit(X86_FEATURE_ARCH_CAPS, fs);
>> + }
>> +}
> Wouldn't this better be accompanied by marking the bit !a in the public
> header?
Yes, probably.
~Andrew
