On 03/03/2023 10:24 am, Oleksii Kurochko wrote: > Signed-off-by: Oleksii Kurochko <oleksii.kuroc...@gmail.com>
Reviewed-by: Andrew Cooper <andrew.coop...@citrix.com> > diff --git a/xen/arch/riscv/riscv64/head.S b/xen/arch/riscv/riscv64/head.S > index adf5d6c74a..8887f0cbd4 100644 > --- a/xen/arch/riscv/riscv64/head.S > +++ b/xen/arch/riscv/riscv64/head.S > @@ -18,6 +19,14 @@ ENTRY(start) > li t0, SSTATUS_FS > csrc CSR_SSTATUS, t0 > > + /* Clear the BSS */ > + la t3, __bss_start > + la t4, __bss_end > +.L_clear_bss: > + REG_S zero, (t3) > + add t3, t3, __SIZEOF_POINTER__ > + bltu t3, t4, .L_clear_bss Using t3/t4 is fine, but it would also have been fine to use t0/t1. ~Andrew
