On 06/12/2022 04:33, Demi Marie Obenour wrote:
> This still hard-codes the assumption that the two spare values are
> mapped to UC. Removing this assumption would require a more complex
> patch.
>
> Signed-off-by: Demi Marie Obenour <d...@invisiblethingslab.com>
Reviewed-by: Andrew Cooper <andrew.coop...@citrix.com>
> ---
> xen/arch/x86/mm.c | 11 ++++-------
> 1 file changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
> index
> 78b1972e4170cacccc9c37c6e64e76e66a7da87f..5d05399c3a841bf03991a3bed63df9a815c1e891
> 100644
> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -961,13 +961,10 @@ get_page_from_l1e(
>
As you noted that this desperately needs a comment, how about
/* Force cacheable memtypes to UC, */
here? Can fix up on commit.
~Andrew
> switch ( l1f & PAGE_CACHE_ATTRS )
> {
> - case 0: /* WB */
> - flip |= _PAGE_PWT | _PAGE_PCD;
> - break;
> - case _PAGE_PWT: /* WT */
> - case _PAGE_PWT | _PAGE_PAT: /* WP */
> - flip |= _PAGE_PCD | (l1f & _PAGE_PAT);
> - break;
> + case _PAGE_WB:
> + case _PAGE_WT:
> + case _PAGE_WP:
> + flip |= (l1f & PAGE_CACHE_ATTRS) ^ _PAGE_UC;
> }
>
> return flip;
