On 13.10.2022 14:05, Roger Pau Monné wrote: > On Thu, Aug 18, 2022 at 03:05:19PM +0200, Jan Beulich wrote: >> From: Artem Bityutskiy <artem.bityuts...@linux.intel.com> >> >> This patch partially reverts the changes made by the following commit: >> >> da0e58c038e6 intel_idle: add 'preferred_cstates' module argument >> >> As that commit describes, on early Sapphire Rapids Xeon platforms the C1 and >> C1E states were mutually exclusive, so that users could only have either C1 >> and >> C6, or C1E and C6. >> >> However, Intel firmware engineers managed to remove this limitation and make >> C1 >> and C1E to be completely independent, just like on previous Xeon platforms. >> >> Therefore, this patch: >> * Removes commentary describing the old, and now non-existing SPR C1E >> limitation. >> * Marks SPR C1E as available by default. >> * Removes the 'preferred_cstates' parameter handling for SPR. Both C1 and >> C1E will be available regardless of 'preferred_cstates' value. >> >> We expect that all SPR systems are shipping with new firmware, which includes >> the C1/C1E improvement. >> >> Signed-off-by: Artem Bityutskiy <artem.bityuts...@linux.intel.com> >> Signed-off-by: Rafael J. Wysocki <rafael.j.wyso...@intel.com> >> Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git >> 1548fac47a11 >> Signed-off-by: Jan Beulich <jbeul...@suse.com> > > Acked-by: Roger Pau Monné <roger....@citrix.com>
Thanks. > I guess we need to be careful of running this on pre-production > hardware then? Well, power savings may not be as expected there, but beyond that I don't think there would be much of an observable effect. Jan
