[AMD Official Use Only - General] FYI
From: Ji, Ruili Sent: 2022年9月6日 15:40 To: qemu-de...@nongnu.org Cc: Liu, Aaron <aaron....@amd.com> Subject: [PATCH] hw/xen: set pci Atomic Ops requests for passthrough device >From c54e0714a1e1cac7dc416bd843b9ec7162bcfc47 Mon Sep 17 00:00:00 2001 From: Ruili Ji ruili...@amd.com<mailto:ruili...@amd.com> Date: Tue, 6 Sep 2022 14:09:41 +0800 Subject: [PATCH] hw/xen: set pci Atomic Ops requests for passthrough device Make guest os access pci device control 2 reg for passthrough device as struct XenPTRegInfo described in the file hw/xen/xen_pt.h. /* reg read only field mask (ON:RO/ROS, OFF:other) */ uint32_t ro_mask; /* reg emulate field mask (ON:emu, OFF:passthrough) */ uint32_t emu_mask; Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1196 Signed-off-by: aaron....@amd.com<mailto:aaron....@amd.com> Signed-off-by: ruili...@amd.com<mailto:ruili...@amd.com> --- hw/xen/xen_pt_config_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c index c5c4e943a8..adc565a00a 100644 --- a/hw/xen/xen_pt_config_init.c +++ b/hw/xen/xen_pt_config_init.c @@ -985,8 +985,8 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[] = { .offset = 0x28, .size = 2, .init_val = 0x0000, - .ro_mask = 0xFFE0, - .emu_mask = 0xFFFF, + .ro_mask = 0xFFA0, + .emu_mask = 0xFFBF, .init = xen_pt_devctrl2_reg_init, .u.w.read = xen_pt_word_reg_read, .u.w.write = xen_pt_word_reg_write, -- 2.34.1
