On 10.06.2022 19:13, Andrew Cooper wrote: > On 10/06/2022 17:00, Andrew Cooper wrote: >> https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/best-practices/data-operand-independent-timing-isa-guidance.html >> https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/running-average-power-limit-energy-reporting.html >> >> Signed-off-by: Andrew Cooper <andrew.coop...@citrix.com> >> --- >> CC: Jan Beulich <jbeul...@suse.com> >> CC: Roger Pau Monné <roger....@citrix.com> >> CC: Wei Liu <w...@xen.org> >> >> The SDM also lists >> >> #define ARCH_CAPS_OVERCLOCKING_STATUS (_AC(1, ULL) << 23) >> >> but I've got no idea what this is, nor the index of MSR_OVERCLOCKING_STATUS >> which is the thing allegedly enumerated by this. > > > Found it. There's an OVER{C}CLOCKING typo in the SDM. It's MSR 0x195 > and new in AlderLake it seems.
With or without bits for it added Reviewed-by: Jan Beulich <jbeul...@suse.com> I'd like to note though that I can't spot such a spelling mistake in version 077 of the SDM (vol 4). Jan
